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Mixing Processor Steppings

Mixing processor steppings (revisions) in a dual environment doesn't always work as well as it should. As a rule of thumb, one stepping difference between two CPUs is generally acceptable. Two steppings is pushing it. Note that some revisions of some operating systems may be more forgiving than others (like WinNT) concerning mixed steppings. The motherboard manufacturer can also give you information about which mixed steppings (if any) are compatible with the motherboard. It's always best to buy matched pairs or to find another chip with the same S-Spec number. Although in many cases, finding an identical chip is quite difficult.

Intel Pentium

Pentium Classic and Pentium w/ MMX processors are designated as '0', '2', or both. Chips with a '0' designation can be used alone or as the primary processor in a dual environment. Those with the '2' designation can only function as secondary processors in a dual environment (they also have the 'DP' designation in the charts). Those with both designations can function as either. See Intel's Pentium Quick Reference Guide for which chips have which designations. Processors listed with comment number 8 do not support DP, FRC, or APIC and cannot function in a dual environment. The information in these charts comes from the Pentium Specification Update which requires the Adobe Acrobat Reader to view it.

On the bottom of the Pentium Classic chips, there is a three letter mark such as: 'SSS'. The last letter indicates whether the chip was tested for dual-processing or not. The letter 'S' indicates the chip was tested for dual-processing, uni-processing and multi-processing. A chip with the letter 'U' means the chips was tested for uni-processing and multi-processing, but not dual-processing. The Pentium w/ MMX chips do not have this lettering system since all P55C chips (except the mobile and OverDrive versions) are capable of dual processing.

BTW, neither Pentium OverDrive processors nor mobile processors support APIC, and cannot be used as upgrades in a dual processor environment. The Pentium Pro OverDrive is the exception to this rule. This chip can run in a dual configuration.

See Mixing Pentium Steppings for Pentium and Pentium with MMX processors.

Intel Pentium Pro

Pentium Pro chips should be as closely matched as possible. Although some motherboards may be more forgiving than others, the less variance the better. Notice that some chips run at 3.5v while most run at 3.3v. If your system was designed to run both chips with one voltage regulator, you would need to match the chip voltages. Although some motherboards may require a separate VRM (voltage regulator module) for the new processor regardless. Check with the manufacturer. The original chip will have an sSpec identification number written on it (such as SL23M). Finding another chip with the same sSpec on it is the ideal situation. But this is often impossible to do. In that case, the chip's stepping should be as close as possible. You can check the stepping of your CPU by using Intel's CPUID program. It will give you the Family, Model, and Stepping. Then download Intel's Pentium Pro Specification Update to try to find a CPU that matches. Unfortunately, most of the ones floating around now are stepping 9, which isn't close enough to the other existing steppings. And any chips with earlier steppings you may find are undoubtedly used processors. Of course, you could always just buy two new chips! :-/

Taken from the Intel Pentium Pro Specification Update PDF file:

Pentium Pro
Stepping 150MHz
B0
(6-1-1) 150MHz
C0
(6-1-2) 166, 180,
200MHz sA0
(6-1-6) 166, 180,
200MHz sA1
(6-1-7) 166, 180,
200MHz sB1
(6-1-9) OverDrive
Processor

150MHz B0
(6-1-1) 3 3 1,3 1,3 1,3 X

150MHz C0
(6-1-2) 3 3 1,3 1,3 1,3 X

166, 180, 200MHz sA0
(6-1-6) 1,3 1,3 3 3 3 X

166, 180, 200MHz sA1
(6-1-7) 1,3 1,3 3 NI NI X

166, 180, 200MHz sB1
(6-1-9) 1,3 1,3 3 NI NI X

OverDrive Processor X X X X X 2

Pentium Pro Stepping	150MHz B0 (6-1-1)	150MHz C0 (6-1-2)	166, 180, 200MHz sA0 (6-1-6)	166, 180, 200MHz sA1 (6-1-7)	166, 180, 200MHz sB1 (6-1-9)	OverDrive Processor
150MHz B0 (6-1-1)	3	3	1,3	1,3	1,3	X
150MHz C0 (6-1-2)	3	3	1,3	1,3	1,3	X
166, 180, 200MHz sA0 (6-1-6)	1,3	1,3	3	3	3	X
166, 180, 200MHz sA1 (6-1-7)	1,3	1,3	3	NI	NI	X
166, 180, 200MHz sB1 (6-1-9)	1,3	1,3	3	NI	NI	X
OverDrive Processor	X	X	X	X	X	2

In the table above, 'NI' implies that there are currently no known issues associated with mixing these steppings. An 'X' implies that these steppings should not be used together in a system. A number indicates a known issue, and refers to the numbered list below. There are no currently known issues associated with mixing cache sizes.
The Pentium Pro 200 with 1MB L2 cache is not yet listed in the Pentium Pro Specification Update.

The 150MHz and the 166, 180, and 200MHz parts vary in their GTL+ T_{CO_MIN} and T_HOLD timings by 250ps. This may affect some system designs. Also, a customer may wish to use a higher frequency replacement for a 150MHz system; this should also be considered.
OverDrive processor upgrades for the Pentium Pro processor will only be supported in one and two processor systems, and are only supported in same stepping configurations.
Errata numbers 39 and 41 may be problematic for 3- or 4-way MP systems which use processor steppings previous to the sA1 stepping.

Also see the Multiprocessor Specification.

Intel Pentium II/III

For dual Pentium II processors to be used in a motherboard, the CPUs must run at the same bus and core speed, use the same voltage, and have the same L2 cache size and characteristics.

A BIOS upgrade may be necessary to get two chips to work in tandem (it supplies any needed microcode updates). It can also help with voltage detection.

Older Pentium II processors (code-named Klamath at 233, 266, and 300MHz) run on a 2.8v core voltage while newer chips (Deschutes running at 266 up through 450MHz) function at 2.0v. These CPUs may not be compatible in the same board unless you install a separate VRM (voltage regulator module) for the secondary processor. Contact the motherboard manufacturer for details.

Even though it is based on the Pentium II core, the Intel Celeron processor does not officially support dual-processing.

The 370-pin FC-PGA Pentium-III Coppermine chips with a 6-8-1 stepping are not dual capable.

The 6-8-3 step (cB0) Slot 1 1GHz Pentium-III Coppermine chips are not dual capable. Neither is the 1.13GHz Slot 1 Pentium III chip, which was recalled.

Taken from the Intel Pentium II Specification Update PDF File:

66MHz
Pentium II
Stepping 233
C0
(6-3-3) 266
C0
(6-3-3) 300
C0
(6-3-3) 233
C1
(6-3-4) 266
C1
(6-3-4) 300
C1
(6-3-4) 266
dA0
(6-5-0) 333
dA0
(6-5-0) 300
dA1
(6-5-1) 333
dA1
(6-5-1) 266
dB0
(6-5-2) 300
dB0
(6-5-2) 333
dB0
(6-5-2)

233 C0 (6-3-3) 1 X X 1 X X X X X X X X X

266 C0 (6-3-3) X 1 X X 1 X 1 X X X 1 X X

300 C0 (6-3-3) X X 1 X X 1 X X 1 X X 1 X

233 C1 (6-3-4) 1 X X NI X X X X X X X X X

266 C1 (6-3-4) X 1 X X NI X NI X X X NI X X

300 C1 (6-3-4) X X 1 X X NI X X NI X X NI X

266 dA0 (6-5-0) X 1 X X NI X NI X X X NI X X

333 dA0 (6-5-0) X X X X X X X NI X NI X X NI

300 dA1 (6-5-1) X X 1 X X NI X X NI X X NI X

333 dA1 (6-5-1) X X X X X X X NI X NI X X NI

266 dB0 (6-5-2) X 1 X X NI X NI X X X NI X X

300 dB0 (6-5-2) X X 1 X X NI X X NI X X NI X

333 dB0 (6-5-2) X X X X X X X NI X NI X X NI

66MHz Pentium II Stepping	233 C0 (6-3-3)	266 C0 (6-3-3)	300 C0 (6-3-3)	233 C1 (6-3-4)	266 C1 (6-3-4)	300 C1 (6-3-4)	266 dA0 (6-5-0)	333 dA0 (6-5-0)	300 dA1 (6-5-1)	333 dA1 (6-5-1)	266 dB0 (6-5-2)	300 dB0 (6-5-2)	333 dB0 (6-5-2)
233 C0 (6-3-3)	1	X	X	1	X	X	X	X	X	X	X	X	X
266 C0 (6-3-3)	X	1	X	X	1	X	1	X	X	X	1	X	X
300 C0 (6-3-3)	X	X	1	X	X	1	X	X	1	X	X	1	X
233 C1 (6-3-4)	1	X	X	NI	X	X	X	X	X	X	X	X	X
266 C1 (6-3-4)	X	1	X	X	NI	X	NI	X	X	X	NI	X	X
300 C1 (6-3-4)	X	X	1	X	X	NI	X	X	NI	X	X	NI	X
266 dA0 (6-5-0)	X	1	X	X	NI	X	NI	X	X	X	NI	X	X
333 dA0 (6-5-0)	X	X	X	X	X	X	X	NI	X	NI	X	X	NI
300 dA1 (6-5-1)	X	X	1	X	X	NI	X	X	NI	X	X	NI	X
333 dA1 (6-5-1)	X	X	X	X	X	X	X	NI	X	NI	X	X	NI
266 dB0 (6-5-2)	X	1	X	X	NI	X	NI	X	X	X	NI	X	X
300 dB0 (6-5-2)	X	X	1	X	X	NI	X	X	NI	X	X	NI	X
333 dB0 (6-5-2)	X	X	X	X	X	X	X	NI	X	NI	X	X	NI

This note explains issues related to populating the second slot in a Slot 1 DP platform. The Pentium II processor, model 5 has a different L2 cache initialization algorithm than Pentium II processor, model 3. Therefore, it is important for BIOS to incorporate necessary Pentium II processor, model 5 updates when populating the second Slot 1 with Pentium II processor, model 5 in a Pentium II processor, model 3 DP platform.
In the table above, the top row indicates the existing processor in a DP system and left-most column displays the upgrade options for the second slot. A number indicates a known issue, and refers to the numbered notes below. An 'NI' implies that there are currently no known issues associated with mixing these processors. Provided appropriate Microcode Update is loaded into the respective processors, both cases ('NI' and number(s), as shown) are supported by Intel. An 'X' implies that these configurations should not be used together in a system and are not supported by Intel. 'TBD' - To Be Determined.
Intel does not recommend running processors at unlike frequencies.
Microcode Updates must be properly installed for all processors in the system regardless of stepping. Note that the microcode update is only available to OEMs (who can supply a BIOS update to end users) and Intel IPD members.
Intel DOES NOT recommend mixing ECC and non-ECC processors. However, if mixed, the system BIOS should disable the ECC on the ECC supported processor to ensure consistent behaviour of time-dependent software, e.g. timing loops.
When mixing processors with different cacheable address ranges, the BIOS should ensure the system cacheable range is set to the lowest range supported by all parts, e.g., 512MB. Addresses above the lowest cacheable range should not be sent to L2, this is accomplished by properly initializing the MTRRs. The requirements for initializing the MTRRs are described in the Extensions to the Pentium^® Pro BIOS Writer's Guide, revision 3.3, Section 2.3.1.
As documented in the Extensions to the Pentium^® Pro BIOS Writer's Guide, in a mixed processor platform the BootStrap Processor (BSP) should be the lowest feature processor - in this case Pentium II processor, model 3. The mixing is permissible only if the BIOS have appropriate code to select the lowest feature BSP processor.
In dual processor systems, the processor with the lowest feature set, as determined by the CPUID Features Bytes, must be the Bootstrap Processor (BSP). In the event of a tie in feature set, the tie should be resolved by selecting the BSP as the processor with the lowest stepping as determined by the CPUID instruction.
While Intel believes that certain customers may wish to perform validation of system configurations with mixed frequency or cache sizes, and that those efforts are an acceptable option to our customers, customers would be fully responsible for the validation of such configurations.

Errata numbers 16 and 17 may be problematic for DP systems which use Pentium II processor, model 3 C0 stepping.

100MHz Pentium II Stepping	350 dA0 (6-5-0)	350 dA1 (6-5-1)	400 dA1 (6-5-1)	350 dB0 (6-5-2)	400 dB0 (6-5-2)	450 dB0 (6-5-2)	350 dB1 (6-5-3)	400 dB1 (6-5-3)
350 dA0 (6-5-0)	NI	NI	X	NI	X	X	NI	X
350 dA1 (6-5-1)	NI	NI	X	NI	X	X	NI	X
400 dA1 (6-5-1)	X	X	NI	X	NI	X	X	NI
350 dB0 (6-5-2)	NI	NI	X	NI	X	X	NI	X
400 dB0 (6-5-2)	X	X	NI	X	NI	X	X	NI
450 dB0 (6-5-2)	X	X	X	X	X	NI	X	X
350 dB1 (6-5-3)	NI	NI	X	NI	X	X	NI	X
400 dB1 (6-5-3)	X	X	NI	X	NI	X	X	NI

Also see: Pentium II Integration Notes.

Taken from the Intel Pentium III Specification Update PDF File:

100MHz Slot 1
Pentium III
Stepping 450
kB0
(6-7-2) 450
kC0
(6-7-3) 500
kB0
(6-7-2) 500
kC0
(6-7-3) 550
kC0
(6-7-3) 600
kC0
(6-7-3)

450 kB0 (6-7-2) NI NI X X X X

450 kC0 (6-7-3) NI NI X X X X

500 kB0 (6-7-2) X X NI NI X X

500 kC0 (6-7-3) X X NI NI X X

550 kC0 (6-7-3) X X X X NI X

600 kC0 (6-7-3) X X X X X NI

100MHz Slot 1
Pentium III
Stepping 550E
cB0
(6-8-3) 600E
cA2
(6-8-1) 600E
cB0
(6-8-3) 600E
cC0
(6-8-6) 650
cA2
(6-8-1) 650
cB0
(6-8-3) 650
cC0
(6-8-6) 700
cA2
(6-8-1) 700
cB0
(6-8-3) 700
cC0
(6-8-6) 750
cA2
(6-8-1) 750
cB0
(6-8-3) 750
cC0
(6-8-6)

550E cB0 (6-8-3) NI X X X X X X X X X X X X

600E cA2 (6-8-1) X NI NI NI X X X X X X X X X

600E cB0 (6-8-3) X NI NI NI X X X X X X X X X

600E cC0 (6-8-6) X NI NI NI X X X X X X X X X

650 cA2 (6-8-1) X X X X NI NI NI X X X X X X

650 cB0 (6-8-3) X X X X NI NI NI X X X X X X

650 cC0 (6-8-6) X X X X NI NI NI X X X X X X

700 cA2 (6-8-1) X X X X X X X NI NI NI X X X

700 cB0 (6-8-3) X X X X X X X NI NI NI X X X

700 cC0 (6-8-6) X X X X X X X NI NI NI X X X

750 cA2 (6-8-1) X X X X X X X X X X NI NI NI

750 cB0 (6-8-3) X X X X X X X X X X NI NI NI

750 cC0 (6-8-6) X X X X X X X X X X NI NI NI

100MHz Slot 1
Pentium III
Stepping 800
cA2
(6-8-1) 800
cB0
(6-8-3) 800
cC0
(6-8-6) 850
cB0
(6-8-3) 850
cC0
(6-8-6) 1.0
cC0
(6-8-6)

800 cA2 (6-8-1) NI NI NI X X X

800 cB0 (6-8-3) NI NI NI X X X

800 cC0 (6-8-6) NI NI NI X X X

850 cB0 (6-8-3) X X X NI NI X

850 cC0 (6-8-6) X X X NI NI X

1.0 cC0 (6-8-6) X X X X X NI

133MHz Slot 1
Pentium III
Stepping 533B
kB0
(6-7-2) 533B
kC0
(6-7-3) 533EB
cA2
(6-8-1) 600B
kC0
(6-7-3) 600EB
cA2
(6-8-1) 600EB
cB0
(6-8-3) 600EB
cC0
(6-8-6) 667
cA2
(6-8-1) 667
cB0
(6-8-3) 667
cC0
(6-8-6) 733
cA2
(6-8-1) 733
cB0
(6-8-3) 733
cC0
(6-8-6)

533B kB0 (6-7-2) NI NI X X X X X X X X X X X

533B kC0 (6-7-3) NI NI X X X X X X X X X X X

533EB cA2 (6-8-1) X X NI X X X X X X X X X X

600B kC0 (6-7-3) X X X NI X X X X X X X X X

600EB cA2 (6-8-1) X X X X NI NI NI X X X X X X

600EB cB0 (6-8-3) X X X X NI NI NI X X X X X X

600EB cC0 (6-8-6) X X X X NI NI NI X X X X X X

667 cA2 (6-8-1) X X X X X X X NI NI NI X X X

667 cB0 (6-8-3) X X X X X X X NI NI NI X X X

667 cC0 (6-8-6) X X X X X X X NI NI NI X X X

733 cA2 (6-8-1) X X X X X X X X X X NI NI NI

733 cB0 (6-8-3) X X X X X X X X X X NI NI NI

733 cC0 (6-8-6) X X X X X X X X X X NI NI NI

133MHz Slot 1
Pentium III
Stepping 800EB
cA2
(6-8-1) 800EB
cA2
(6-8-1) 800EB
cA2
(6-8-1) 866
cB0
(6-8-3) 866
cC0
(6-8-6) 933
cB0
(6-8-3) 933
cC0
(6-8-6) 1.0B
cB0
(6-8-3) 1.0B
cC0
(6-8-6) 1.13
cC0
(6-8-6)

800EB cA2 (6-8-1) NI NI NI X X X X X X X

800EB cB0 (6-8-3) NI NI NI X X X X X X X

800EB cC0 (6-8-6) NI NI NI X X X X X X X

866 cB0 (6-8-3) X X X NI NI X X X X X

866 cC0 (6-8-6) X X X NI NI X X X X X

933 cB0 (6-8-3) X X X X X NI NI X X X

933 cC0 (6-8-6) X X X X X NI NI X X X

1.0B cB0 (6-8-3) X X X X X X X X X X

1.0B cC0 (6-8-6) X X X X X X X X NI X

1.13 cC0 (6-8-6) X X X X X X X X X X

100MHz FC-PGA
Pentium III
Stepping 500
cB0
(6-8-3) 550
cB0
(6-8-3) 600E
cB0
(6-8-3) 600E
cC0
(6-8-6) 600E
cD0
(6-8-A) 650
cB0
(6-8-3) 650
cC0
(6-8-6) 700
cB0
(6-8-3) 700
cC0
(6-8-6) 700
cD0
(6-8-A) 750
cB0
(6-8-3) 750
cC0
(6-8-6) 750
cD0
(6-8-A)

500 cB0 (6-8-3) NI X X X X X X X X X X X X

550 cB0 (6-8-3) X NI X X X X X X X X X X X

600E cB0 (6-8-3) X X NI NI NI X X X X X X X X

600E cC0 (6-8-6) X X NI NI NI X X X X X X X X

600E cD0 (6-8-A) X X NI NI NI X X X X X X X X

650 cB0 (6-8-3) X X X X X NI NI X X X X X X

650 cC0 (6-8-6) X X X X X NI NI X X X X X X

700 cB0 (6-8-3) X X X X X X X NI NI NI X X X

700 cC0 (6-8-6) X X X X X X X NI NI NI X X X

700 cD0 (6-8-A) X X X X X X X NI NI NI X X X

750 cB0 (6-8-3) X X X X X X X X X X NI NI NI

750 cC0 (6-8-6) X X X X X X X X X X NI NI NI

750 cD0 (6-8-A) X X X X X X X X X X NI NI NI

100MHz FC-PGA
Pentium III
Stepping 800
cB0
(6-8-3) 800
cC0
(6-8-6) 800
cD0
(6-8-A) 850
cB0
(6-8-3) 850
cC0
(6-8-6) 850
cD0
(6-8-A) 900
cC0
(6-8-6) 900
cD0
(6-8-A) 1000
cD0
(6-8-A) 1100
cD0
(6-8-A)

800 cB0 (6-8-3) NI NI NI X X X X X X X

800 cC0 (6-8-6) NI NI NI X X X X X X X

800 cD0 (6-8-A) NI NI NI X X X X X X X

850 cB0 (6-8-3) X X X NI NI NI X X X X

850 cC0 (6-8-6) X X X NI NI NI X X X X

850 cD0 (6-8-A) X X X NI NI NI X X X X

900 cC0 (6-8-6) X X X X X X NI NI X X

900 cD0 (6-8-A) X X X X X X NI NI X X

1000 cD0 (6-8-A) X X X X X X X X NI X

1100 cD0 (6-8-A) X X X X X X X X X NI

133MHz FC-PGA
Pentium III
Stepping 533EB
cB0
(6-8-3) 600EB
cB0
(6-8-3) 600EB
cC0
(6-8-6) 667
cB0
(6-8-3) 667
cC0
(6-8-6) 733
cB0
(6-8-3) 733
cC0
(6-8-6) 733
cD0
(6-8-A) 800EB
cB0
(6-8-3) 800EB
cC0
(6-8-6) 800EB
cD0
(6-8-A)

533EB cB0 (6-8-3) NI X X X X X X X X X X

600EB cB0 (6-8-3) X NI NI X X X X X X X X

600EB cC0 (6-8-6) X NI NI X X X X X X X X

667 cB0 (6-8-3) X X X NI NI X X X X X X

667 cC0 (6-8-6) X X X NI NI X X X X X X

733 cB0 (6-8-3) X X X X X NI NI NI X X X

733 cC0 (6-8-6) X X X X X NI NI NI X X X

733 cD0 (6-8-A) X X X X X NI NI NI X X X

800 cB0 (6-8-3) X X X X X X X X NI NI NI

800 cC0 (6-8-6) X X X X X X X X NI NI NI

800 cD0 (6-8-A) X X X X X X X X NI NI NI

133MHz FC-PGA
Pentium III
Stepping 866
cB0
(6-8-3) 866
cC0
(6-8-6) 866
cD0
(6-8-A) 933
cB0
(6-8-3) 933
cC0
(6-8-6) 933
cD0
(6-8-A) 1.0B
cB0
(6-8-3) 1.0B
cC0
(6-8-6) 1.0B
cD0
(6-8-A)

866 cB0 (6-8-3) NI NI NI X X X X X X

866 cC0 (6-8-6) NI NI NI X X X X X X

866 cD0 (6-8-A) NI NI NI X X X X X X

933 cB0 (6-8-3) X X X NI NI NI X X X

933 cC0 (6-8-6) X X X NI NI NI X X X

933 cD0 (6-8-A) X X X NI NI NI X X X

1.0B cB0 (6-8-3) X X X X X X NI NI NI

1.0B cC0 (6-8-6) X X X X X X NI NI NI

1.0B cD0 (6-8-A) X X X X X X NI NI NI

133MHz
1.25v AGTL
Pentium III
Stepping 866
cD0
(6-8-A) 933
cD0
(6-8-A) 1.0B
cD0
(6-8-A) 1.13
cD0
(6-8-A) 800
tA1
(6-B-1) 1.0B
tA1
(6-B-1) 1.13
tA1
(6-B-1) 1.26
tA1
(6-B-1) 1.4
tA1
(6-B-1)

866 cD0 (6-8-A) NI X X X X X X X X

933 cD0 (6-8-A) X NI X X X X X X X

1.0B cD0 (6-8-A) X X NI X X X X X X

1.13 cD0 (6-8-A) X X X NI X X X X X

800 tA1 (6-B-1) X X X X NI X X X X

1.0B tA1 (6-B-1) X X X X X NI X X X

1.13 tA1 (6-B-1) X X X X X X NI X X

1.26 tA1 (6-B-1) X X X X X X X NI X

1.4 tA1 (6-B-1) X X X X X X X X NI

100MHz Slot 1 Pentium III Stepping	450 kB0 (6-7-2)	450 kC0 (6-7-3)	500 kB0 (6-7-2)	500 kC0 (6-7-3)	550 kC0 (6-7-3)	600 kC0 (6-7-3)
450 kB0 (6-7-2)	NI	NI	X	X	X	X
450 kC0 (6-7-3)	NI	NI	X	X	X	X
500 kB0 (6-7-2)	X	X	NI	NI	X	X
500 kC0 (6-7-3)	X	X	NI	NI	X	X
550 kC0 (6-7-3)	X	X	X	X	NI	X
600 kC0 (6-7-3)	X	X	X	X	X	NI
100MHz Slot 1 Pentium III Stepping	550E cB0 (6-8-3)	600E cA2 (6-8-1)	600E cB0 (6-8-3)	600E cC0 (6-8-6)	650 cA2 (6-8-1)	650 cB0 (6-8-3)	650 cC0 (6-8-6)	700 cA2 (6-8-1)	700 cB0 (6-8-3)	700 cC0 (6-8-6)	750 cA2 (6-8-1)	750 cB0 (6-8-3)	750 cC0 (6-8-6)
550E cB0 (6-8-3)	NI	X	X	X	X	X	X	X	X	X	X	X	X
600E cA2 (6-8-1)	X	NI	NI	NI	X	X	X	X	X	X	X	X	X
600E cB0 (6-8-3)	X	NI	NI	NI	X	X	X	X	X	X	X	X	X
600E cC0 (6-8-6)	X	NI	NI	NI	X	X	X	X	X	X	X	X	X
650 cA2 (6-8-1)	X	X	X	X	NI	NI	NI	X	X	X	X	X	X
650 cB0 (6-8-3)	X	X	X	X	NI	NI	NI	X	X	X	X	X	X
650 cC0 (6-8-6)	X	X	X	X	NI	NI	NI	X	X	X	X	X	X
700 cA2 (6-8-1)	X	X	X	X	X	X	X	NI	NI	NI	X	X	X
700 cB0 (6-8-3)	X	X	X	X	X	X	X	NI	NI	NI	X	X	X
700 cC0 (6-8-6)	X	X	X	X	X	X	X	NI	NI	NI	X	X	X
750 cA2 (6-8-1)	X	X	X	X	X	X	X	X	X	X	NI	NI	NI
750 cB0 (6-8-3)	X	X	X	X	X	X	X	X	X	X	NI	NI	NI
750 cC0 (6-8-6)	X	X	X	X	X	X	X	X	X	X	NI	NI	NI
100MHz Slot 1 Pentium III Stepping	800 cA2 (6-8-1)	800 cB0 (6-8-3)	800 cC0 (6-8-6)	850 cB0 (6-8-3)	850 cC0 (6-8-6)	1.0 cC0 (6-8-6)
800 cA2 (6-8-1)	NI	NI	NI	X	X	X
800 cB0 (6-8-3)	NI	NI	NI	X	X	X
800 cC0 (6-8-6)	NI	NI	NI	X	X	X
850 cB0 (6-8-3)	X	X	X	NI	NI	X
850 cC0 (6-8-6)	X	X	X	NI	NI	X
1.0 cC0 (6-8-6)	X	X	X	X	X	NI

133MHz Slot 1 Pentium III Stepping	533B kB0 (6-7-2)	533B kC0 (6-7-3)	533EB cA2 (6-8-1)	600B kC0 (6-7-3)	600EB cA2 (6-8-1)	600EB cB0 (6-8-3)	600EB cC0 (6-8-6)	667 cA2 (6-8-1)	667 cB0 (6-8-3)	667 cC0 (6-8-6)	733 cA2 (6-8-1)	733 cB0 (6-8-3)	733 cC0 (6-8-6)
533B kB0 (6-7-2)	NI	NI	X	X	X	X	X	X	X	X	X	X	X
533B kC0 (6-7-3)	NI	NI	X	X	X	X	X	X	X	X	X	X	X
533EB cA2 (6-8-1)	X	X	NI	X	X	X	X	X	X	X	X	X	X
600B kC0 (6-7-3)	X	X	X	NI	X	X	X	X	X	X	X	X	X
600EB cA2 (6-8-1)	X	X	X	X	NI	NI	NI	X	X	X	X	X	X
600EB cB0 (6-8-3)	X	X	X	X	NI	NI	NI	X	X	X	X	X	X
600EB cC0 (6-8-6)	X	X	X	X	NI	NI	NI	X	X	X	X	X	X
667 cA2 (6-8-1)	X	X	X	X	X	X	X	NI	NI	NI	X	X	X
667 cB0 (6-8-3)	X	X	X	X	X	X	X	NI	NI	NI	X	X	X
667 cC0 (6-8-6)	X	X	X	X	X	X	X	NI	NI	NI	X	X	X
733 cA2 (6-8-1)	X	X	X	X	X	X	X	X	X	X	NI	NI	NI
733 cB0 (6-8-3)	X	X	X	X	X	X	X	X	X	X	NI	NI	NI
733 cC0 (6-8-6)	X	X	X	X	X	X	X	X	X	X	NI	NI	NI
133MHz Slot 1 Pentium III Stepping	800EB cA2 (6-8-1)	800EB cA2 (6-8-1)	800EB cA2 (6-8-1)	866 cB0 (6-8-3)	866 cC0 (6-8-6)	933 cB0 (6-8-3)	933 cC0 (6-8-6)	1.0B cB0 (6-8-3)	1.0B cC0 (6-8-6)	1.13 cC0 (6-8-6)
800EB cA2 (6-8-1)	NI	NI	NI	X	X	X	X	X	X	X
800EB cB0 (6-8-3)	NI	NI	NI	X	X	X	X	X	X	X
800EB cC0 (6-8-6)	NI	NI	NI	X	X	X	X	X	X	X
866 cB0 (6-8-3)	X	X	X	NI	NI	X	X	X	X	X
866 cC0 (6-8-6)	X	X	X	NI	NI	X	X	X	X	X
933 cB0 (6-8-3)	X	X	X	X	X	NI	NI	X	X	X
933 cC0 (6-8-6)	X	X	X	X	X	NI	NI	X	X	X
1.0B cB0 (6-8-3)	X	X	X	X	X	X	X	X	X	X
1.0B cC0 (6-8-6)	X	X	X	X	X	X	X	X	NI	X
1.13 cC0 (6-8-6)	X	X	X	X	X	X	X	X	X	X

100MHz FC-PGA Pentium III Stepping	500 cB0 (6-8-3)	550 cB0 (6-8-3)	600E cB0 (6-8-3)	600E cC0 (6-8-6)	600E cD0 (6-8-A)	650 cB0 (6-8-3)	650 cC0 (6-8-6)	700 cB0 (6-8-3)	700 cC0 (6-8-6)	700 cD0 (6-8-A)	750 cB0 (6-8-3)	750 cC0 (6-8-6)	750 cD0 (6-8-A)
500 cB0 (6-8-3)	NI	X	X	X	X	X	X	X	X	X	X	X	X
550 cB0 (6-8-3)	X	NI	X	X	X	X	X	X	X	X	X	X	X
600E cB0 (6-8-3)	X	X	NI	NI	NI	X	X	X	X	X	X	X	X
600E cC0 (6-8-6)	X	X	NI	NI	NI	X	X	X	X	X	X	X	X
600E cD0 (6-8-A)	X	X	NI	NI	NI	X	X	X	X	X	X	X	X
650 cB0 (6-8-3)	X	X	X	X	X	NI	NI	X	X	X	X	X	X
650 cC0 (6-8-6)	X	X	X	X	X	NI	NI	X	X	X	X	X	X
700 cB0 (6-8-3)	X	X	X	X	X	X	X	NI	NI	NI	X	X	X
700 cC0 (6-8-6)	X	X	X	X	X	X	X	NI	NI	NI	X	X	X
700 cD0 (6-8-A)	X	X	X	X	X	X	X	NI	NI	NI	X	X	X
750 cB0 (6-8-3)	X	X	X	X	X	X	X	X	X	X	NI	NI	NI
750 cC0 (6-8-6)	X	X	X	X	X	X	X	X	X	X	NI	NI	NI
750 cD0 (6-8-A)	X	X	X	X	X	X	X	X	X	X	NI	NI	NI
100MHz FC-PGA Pentium III Stepping	800 cB0 (6-8-3)	800 cC0 (6-8-6)	800 cD0 (6-8-A)	850 cB0 (6-8-3)	850 cC0 (6-8-6)	850 cD0 (6-8-A)	900 cC0 (6-8-6)	900 cD0 (6-8-A)	1000 cD0 (6-8-A)	1100 cD0 (6-8-A)
800 cB0 (6-8-3)	NI	NI	NI	X	X	X	X	X	X	X
800 cC0 (6-8-6)	NI	NI	NI	X	X	X	X	X	X	X
800 cD0 (6-8-A)	NI	NI	NI	X	X	X	X	X	X	X
850 cB0 (6-8-3)	X	X	X	NI	NI	NI	X	X	X	X
850 cC0 (6-8-6)	X	X	X	NI	NI	NI	X	X	X	X
850 cD0 (6-8-A)	X	X	X	NI	NI	NI	X	X	X	X
900 cC0 (6-8-6)	X	X	X	X	X	X	NI	NI	X	X
900 cD0 (6-8-A)	X	X	X	X	X	X	NI	NI	X	X
1000 cD0 (6-8-A)	X	X	X	X	X	X	X	X	NI	X
1100 cD0 (6-8-A)	X	X	X	X	X	X	X	X	X	NI

133MHz FC-PGA Pentium III Stepping	533EB cB0 (6-8-3)	600EB cB0 (6-8-3)	600EB cC0 (6-8-6)	667 cB0 (6-8-3)	667 cC0 (6-8-6)	733 cB0 (6-8-3)	733 cC0 (6-8-6)	733 cD0 (6-8-A)	800EB cB0 (6-8-3)	800EB cC0 (6-8-6)	800EB cD0 (6-8-A)
533EB cB0 (6-8-3)	NI	X	X	X	X	X	X	X	X	X	X
600EB cB0 (6-8-3)	X	NI	NI	X	X	X	X	X	X	X	X
600EB cC0 (6-8-6)	X	NI	NI	X	X	X	X	X	X	X	X
667 cB0 (6-8-3)	X	X	X	NI	NI	X	X	X	X	X	X
667 cC0 (6-8-6)	X	X	X	NI	NI	X	X	X	X	X	X
733 cB0 (6-8-3)	X	X	X	X	X	NI	NI	NI	X	X	X
733 cC0 (6-8-6)	X	X	X	X	X	NI	NI	NI	X	X	X
733 cD0 (6-8-A)	X	X	X	X	X	NI	NI	NI	X	X	X
800 cB0 (6-8-3)	X	X	X	X	X	X	X	X	NI	NI	NI
800 cC0 (6-8-6)	X	X	X	X	X	X	X	X	NI	NI	NI
800 cD0 (6-8-A)	X	X	X	X	X	X	X	X	NI	NI	NI
133MHz FC-PGA Pentium III Stepping	866 cB0 (6-8-3)	866 cC0 (6-8-6)	866 cD0 (6-8-A)	933 cB0 (6-8-3)	933 cC0 (6-8-6)	933 cD0 (6-8-A)	1.0B cB0 (6-8-3)	1.0B cC0 (6-8-6)	1.0B cD0 (6-8-A)
866 cB0 (6-8-3)	NI	NI	NI	X	X	X	X	X	X
866 cC0 (6-8-6)	NI	NI	NI	X	X	X	X	X	X
866 cD0 (6-8-A)	NI	NI	NI	X	X	X	X	X	X
933 cB0 (6-8-3)	X	X	X	NI	NI	NI	X	X	X
933 cC0 (6-8-6)	X	X	X	NI	NI	NI	X	X	X
933 cD0 (6-8-A)	X	X	X	NI	NI	NI	X	X	X
1.0B cB0 (6-8-3)	X	X	X	X	X	X	NI	NI	NI
1.0B cC0 (6-8-6)	X	X	X	X	X	X	NI	NI	NI
1.0B cD0 (6-8-A)	X	X	X	X	X	X	NI	NI	NI

133MHz 1.25v AGTL Pentium III Stepping	866 cD0 (6-8-A)	933 cD0 (6-8-A)	1.0B cD0 (6-8-A)	1.13 cD0 (6-8-A)	800 tA1 (6-B-1)	1.0B tA1 (6-B-1)	1.13 tA1 (6-B-1)	1.26 tA1 (6-B-1)	1.4 tA1 (6-B-1)
866 cD0 (6-8-A)	NI	X	X	X	X	X	X	X	X
933 cD0 (6-8-A)	X	NI	X	X	X	X	X	X	X
1.0B cD0 (6-8-A)	X	X	NI	X	X	X	X	X	X
1.13 cD0 (6-8-A)	X	X	X	NI	X	X	X	X	X
800 tA1 (6-B-1)	X	X	X	X	NI	X	X	X	X
1.0B tA1 (6-B-1)	X	X	X	X	X	NI	X	X	X
1.13 tA1 (6-B-1)	X	X	X	X	X	X	NI	X	X
1.26 tA1 (6-B-1)	X	X	X	X	X	X	X	NI	X
1.4 tA1 (6-B-1)	X	X	X	X	X	X	X	X	NI

The cD0 chips listed in the '1.25v AGTL' table immediately above can operate at either 1.5v or 1.25v AGTL+/AGTL in single-chip operation (they are Coppermine-T chips). For DP mode, 1.25v must be used. The tA1 chips are the Tualatin chips (0.13µm, 512KB L2) and can only run at 1.25v AGTL in either single or dual mode operation. All of the other P-III chips listed in the other tables are legacy chips and utilize 1.5v AGTL+ only. Some Coppermine-T and all Tualatin chips come with the large FC-PGA2 heatsink cap. The SL5QE, SL5QF, SL5QJ, and SL5QK chips are Coppermine-T processors, but only QJ and QK come with the new heat spreader. Also note that some regular Coppermine chips also come with the new heat spreader. The new heatsink cap does not automatically mean the chip is Coppermine-T or Tualatin.

Also see: Pentium III Integration Notes.

Intel Xeon

The SL3FK and SL3FR Xeon chips can only be used in a dual configuration; quad isn't possible with these chips. The 133MHz-based Xeon chips can only be used in dual configurations. Chips that run on a 100MHz bus can run in quad and higher configurations.

Taken from the Intel Pentium II Xeon Specification Update PDF File:

100MHz
Pentium II Xeon
Stepping 400
B0
(6-5-2) 400
B1
(6-5-3) 450
B1
(6-5-3)

400 B0 (6-5-2) 1,2 1,2 X

400 B1 (6-5-3) 1,2 1 X

450 B1 (6-5-3) X X 1

100MHz Pentium II Xeon Stepping	400 B0 (6-5-2)	400 B1 (6-5-3)	450 B1 (6-5-3)
400 B0 (6-5-2)	1,2	1,2	X
400 B1 (6-5-3)	1,2	1	X
450 B1 (6-5-3)	X	X	1

While Intel has done nothing to prevent different frequency Pentium II Xeon processors within a system from working together, there may be uncharacterized errata which exist in such configurations. These configurations are not supported by Intel. In mixed stepping systems, all processors must be run at an identical frequency (i.e. the highest frequency acceptable to all components).
The workarounds for various errata must take all processors into account.
Errata for all processor steppings present in a system will affect that system, until worked around.
Microcode Updates must be properly installed for all processors in the system regardless of stepping.
FRC mode is not supported using a master and checker pair with different steppings or model numbers.
In the table above, 'NI' implies that there are currently no known issues associated with mixing these steppings. An 'X' implies that these steppings should not be used together in a system and are not supported by Intel in such a configuration. A number indicates a known issue, and refers to the numbered list below.
While there are currently no known issues associated with mixing cache size, Intel does not recommend or validate mixing processors with other cache sizes.
The following notes only apply to specific combinations:
1. Some of these processors are affected by errata which may affect the features an MP system is able to support. See the Pentium II Xeon Processor Identification and Package Information for details on which processors are affected by these errata.
2. Some B0 stepping processors must be operated at 65°C, which is a lower Tplate specification than normal. See the Pentium II Xeon Processor Identification and Package Information for more details.

Taken from the Intel Pentium III Xeon Specification Update PDF File:

100MHz
Pentium III Xeon
Stepping 500
B0
(6-7-2) 500
C0
(6-7-3) 550
C0
(6-7-3) 700
A0
(6-A-0)
1MB 700
A0
(6-A-0)
2MB 700
A0
(6-A-0')
1MB 700
A0
(6-A-0')
2MB 700
A1
(6-A-1)
1MB 700
A1
(6-A-1)
2MB 700
B0
(6-A-4)
1MB 700
B0
(6-A-4)
2MB 900
B0
(6-A-4)
2MB

500 B0 (6-7-2) NI 1,2 X X X X X X X X X X

500 C0 (6-7-3) 1,2 NI X X X X X X X X X X

550 C0 (6-7-3) X X NI X X X X X X X X X

700 A0 (6-A-0) 1MB X X X 3 X X X 1 X 1,4 X X

700 A0 (6-A-0) 2MB X X X X 3 X X X 1 X 1,4 X

700 A0 (6-A-0') 1MB X X X X X 3 X X X X X X

700 A0 (6-A-0') 2MB X X X X X X 3 X X X X X

700 A1 (6-A-1) 1MB X X X 1 X X X NI X 1,4 X X

700 A1 (6-A-1) 2MB X X X X 1 X X X NI X 1,4 X

700 B0 (6-A-4) 1MB X X X 1,4 X X X 1,4 X 4 X X

700 B0 (6-A-4) 2MB X X X X 1,4 X X X 1,4 X 4 X

900 B0 (6-A-4) 2MB X X X X X X X X X X X 4

133MHz
Pentium III Xeon
Stepping 600
cA2
(6-8-1) 667
cA2
(6-8-1) 733
cA2
(6-8-1) 800
cA2
(6-8-1) 600
cB0
(6-8-3) 667
cB0
(6-8-3) 733
cB0
(6-8-3) 733
cC0
(6-8-6) 800
cB0
(6-8-3) 800
cC0
(6-8-6) 866
cB0
(6-8-3) 866
cC0
(6-8-6) 933
cC0
(6-8-6) 1000
cC0
(6-8-6)

600 cA2 (6-8-1) NI X X X 1 X X X X X X X X X

667 cA2 (6-8-1) X NI X X X 1 X X X X X X X X

733 cA2 (6-8-1) X X NI X X X 1 1 X X X X X X

800 cA2 (6-8-1) X X X NI X X X X 1 1 X X X X

600 cB0 (6-8-3) 1 X X X NI X X X X X X X X X

667 cB0 (6-8-3) X 1 X X X NI X X X X X X X X

733 cB0 (6-8-3) X X 1 X X X NI 1 X X X X X X

733 cC0 (6-8-6) X X 1 X X X 1 NI X X X X X X

800 cB0 (6-8-3) X X X 1 X X X X NI 1 X X X X

800 cC0 (6-8-6) X X X 1 X X X X 1 NI X X X X

866 cB0 (6-8-3) X X X X X X X X X X NI 1 X X

866 cC0 (6-8-6) X X X X X X X X X X 1 NI X X

933 cC0 (6-8-6) X X X X X X X X X X X X NI X

1000 cC0 (6-8-6) X X X X X X X X X X X X X NI

100MHz Pentium III Xeon Stepping	500 B0 (6-7-2)	500 C0 (6-7-3)	550 C0 (6-7-3)	700 A0 (6-A-0) 1MB	700 A0 (6-A-0) 2MB	700 A0 (6-A-0') 1MB	700 A0 (6-A-0') 2MB	700 A1 (6-A-1) 1MB	700 A1 (6-A-1) 2MB	700 B0 (6-A-4) 1MB	700 B0 (6-A-4) 2MB	900 B0 (6-A-4) 2MB
500 B0 (6-7-2)	NI	1,2	X	X	X	X	X	X	X	X	X	X
500 C0 (6-7-3)	1,2	NI	X	X	X	X	X	X	X	X	X	X
550 C0 (6-7-3)	X	X	NI	X	X	X	X	X	X	X	X	X
700 A0 (6-A-0) 1MB	X	X	X	3	X	X	X	1	X	1,4	X	X
700 A0 (6-A-0) 2MB	X	X	X	X	3	X	X	X	1	X	1,4	X
700 A0 (6-A-0') 1MB	X	X	X	X	X	3	X	X	X	X	X	X
700 A0 (6-A-0') 2MB	X	X	X	X	X	X	3	X	X	X	X	X
700 A1 (6-A-1) 1MB	X	X	X	1	X	X	X	NI	X	1,4	X	X
700 A1 (6-A-1) 2MB	X	X	X	X	1	X	X	X	NI	X	1,4	X
700 B0 (6-A-4) 1MB	X	X	X	1,4	X	X	X	1,4	X	4	X	X
700 B0 (6-A-4) 2MB	X	X	X	X	1,4	X	X	X	1,4	X	4	X
900 B0 (6-A-4) 2MB	X	X	X	X	X	X	X	X	X	X	X	4

133MHz Pentium III Xeon Stepping	600 cA2 (6-8-1)	667 cA2 (6-8-1)	733 cA2 (6-8-1)	800 cA2 (6-8-1)	600 cB0 (6-8-3)	667 cB0 (6-8-3)	733 cB0 (6-8-3)	733 cC0 (6-8-6)	800 cB0 (6-8-3)	800 cC0 (6-8-6)	866 cB0 (6-8-3)	866 cC0 (6-8-6)	933 cC0 (6-8-6)	1000 cC0 (6-8-6)
600 cA2 (6-8-1)	NI	X	X	X	1	X	X	X	X	X	X	X	X	X
667 cA2 (6-8-1)	X	NI	X	X	X	1	X	X	X	X	X	X	X	X
733 cA2 (6-8-1)	X	X	NI	X	X	X	1	1	X	X	X	X	X	X
800 cA2 (6-8-1)	X	X	X	NI	X	X	X	X	1	1	X	X	X	X
600 cB0 (6-8-3)	1	X	X	X	NI	X	X	X	X	X	X	X	X	X
667 cB0 (6-8-3)	X	1	X	X	X	NI	X	X	X	X	X	X	X	X
733 cB0 (6-8-3)	X	X	1	X	X	X	NI	1	X	X	X	X	X	X
733 cC0 (6-8-6)	X	X	1	X	X	X	1	NI	X	X	X	X	X	X
800 cB0 (6-8-3)	X	X	X	1	X	X	X	X	NI	1	X	X	X	X
800 cC0 (6-8-6)	X	X	X	1	X	X	X	X	1	NI	X	X	X	X
866 cB0 (6-8-3)	X	X	X	X	X	X	X	X	X	X	NI	1	X	X
866 cC0 (6-8-6)	X	X	X	X	X	X	X	X	X	X	1	NI	X	X
933 cC0 (6-8-6)	X	X	X	X	X	X	X	X	X	X	X	X	NI	X
1000 cC0 (6-8-6)	X	X	X	X	X	X	X	X	X	X	X	X	X	NI

While Intel has done nothing to prevent different frequency Pentium III Xeon processors within a system from working together, there may be uncharacterized errata which exist in such configurations. These configurations are not supported by Intel. In mixed stepping systems, all processors must be run at an identical frequency (i.e. the highest frequency acceptable to all components).
The workarounds for various errata must take all processors into account.
Errata for all processor steppings present in a system will affect that system, until worked around.
Microcode Updates must be properly installed for all processors in the system regardless of stepping.
FRC mode is not supported using a master and checker pair with different steppings or model numbers.
In the table above, 'NI' implies that there are currently no known issues associated with mixing these steppings. An 'X' implies that these steppings should not be used together in a system and are not supported by Intel in such a configuration. A number indicates a known issue, and refers to the numbered list below.
While there are currently no known issues associated with mixing cache size, Intel does not recommend or validate mixing processors with other cache sizes.
The following notes only apply to specific combinations:
1. Some of these processors are affected by errata which may affect the features an MP system is able to support. See the Pentium III Xeon Processor Identification and Package Information for details on which processors are affected by these errata.
2. B0 and C0 stepping processors may have differing cache components which require differing voltages. When mixing these steppings the proper cache voltage as identified by the VID pins must be supplied to each cartridge.
3. See notes 11 and 12 in the specification update (Identification and Package Information chart) for errata between chips with differing AGTL+ reference voltages. The incompatible 6-A-0 step chips are differentiated with a prime (') marking in the charts (these chips are listed with note 12 (11.5/15 Vtt AGTL+) in the PDF).
4. The Pentium III Xeon processor at 900MHz with 2MB of L2 cache will ignore the logic states presented to the core/bus ratio pins (A20M#, IGNNE#, LINT0, LINT1) at the de-assertion of the RESET# signal, and will operate only with a 9:1 core/bus ratio. For this reason, the Pentium III Xeon processor at 900MHz with 2MB of L2 cache should only be used in systems containing identical processors. Use of the Pentium III Xeon processor at 900MHz with 2MB of L2 cache in systems containing the Pentium III Xeon processor at 700MHz with 2MB of L2 cache will result in processors running at different frequencies, which is not a supported configuration.
It seems unlikely at this point that Intel will certify multiprocessing (4 or more CPUs) for the 133MHz GTL+ bus. Update: And indeed, they won't.

Current URL: http://www.pchardwarelinks.com/mixed.htm
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